Wafer Level Packaging

Download SUSS MicroTec technical publications, white papers and application notes about wafer level packaging.

Spray Coating in Wafer-Level Packaging

Driven by the need for form factor reduction of components used in mobile devices, technologies like wafer-level packaging and high density interposers are increasingly adopted. However, there is no standard WLP, as each chip varies in thickness, material composition, structure and size. This leads to a growing variety of packaging technologies and, thus, the need of flexible processes. Most of the required process steps are performed on standard wafer processing equipment limiting the methods to common processes. Spray coating of organic materials is one of the key technologies to overcome the current barriers and is more and more becoming standard.

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Metal Based Wafer Bonding Techniques for Wafer Level Packaging

Wafer level bonding utilizing metal based technologies are coming to the forefront of manufacturing methods in numerous 3D integration schemes and advanced MEMS processing. Copper to copper bonding of TSVs (through silicon vias) is used for 3D IC stacking of individual layers as well as in 3D packaging operations. A primary differentiator is the via size and therefore the placement accuracy needed to obtain production yields. This document describes the necessary conditions for these metal based bonding processes.

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Metal Based Wafer Level Packaging

Metal based wafer bonding for WLP has several advantages including enhanced hermeticity and it facilitates vertical integration. These advantages allow for reduction in die size and cost savings with improved device performance. Until recently, first level packaging for MEMS was done using glass frit or anodic bond process. The glass based bonding methods are used in over 80% of volume MEMS production for high volume products such as pressure sensors, accelerometers and gyroscopes. 

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Wafer Level Packaging: Balancing Device Requirements and Materials Properties

Wafer level packaging for MEMS devices in the front end has a field proven history that now allows for these techniques to facilitate back end packaging and device integration. The most common methods for MEMS assembly include anodic and glass frit bonding which comprise more than 70-80% of all volume manufacturing processing today. However, metal based bonding schemes such as metal eutectics and metal diffusion seals provide increased hermeticity levels and facilitate inter-wafer and intra-device electrical connections.

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Precision Wafer to Wafer Packaging Using Eutectic Metal Bonding

Hermetic packaging of sensors has historically been achieved with glass frit and anodic bonding techniques. However, these techniques are presently limiting scaling of devices and are not appropriate for integration plans for CMOS compatible MEMS. The widespread use of glass frit bonding can be attributed to its tolerance to particles and surface topography, hermetic quality of the seals, and inexpensive processing costs. In comparison, eutectic alloys provide better hermeticity levels, are equally tolerate to roughness and particles and enable device scaling and integration.

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Enabling Thin Wafer Metal to Metal Bonding through Integration of High Temperature Polyimide Adhesives and Effective Copper Surface Cleans

This paper will examine the use of high temperature Polyimide temporary adhesives and advanced copper cleaning solutions for thin wafer handling during metal to metal (Cu-Cu) bonding. In the case of Cu to Cu solid state diffusion bonding, temperature requirements can be up to 400C for as long as 40 minutes. These extreme conditions pose a significant challenge with existing materials used for temporary bonding. Polyimides are ideally suited for high temperature applications and polyimide adhesives have been developed which can withstand 400°C processing without significant failure in adhesion. As well, Cu to Cu bonding processes will require the need for contamination free surfaces, which becomes increasingly important if lower temperature processes (<400oC) are desired. Close-coupled copper cleaning immediately prior to the bonding step offers an excellent approach for providing process reproducibility while achieving increased electrical yields. Utilizing advanced wet cleaning solutions to obtain optimal Cu surface preparation by removing undesirable copper oxide and Benzotriazole (BTA) layers, and potentially adding a copper oxidation barrier (COB) functionality will be discussed in detail.

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LED Wafer Level Packaging – Motivation, challenges and solutions to meet future cost targets

In the last years, the manufacturing cost reduction of LED devices was mainly accomplished by increased equipment throughput, lower Capex, yield improvements and a higher degree of automation using dedicated tools for LED manufacturing. Further significant cost reduction is expected by the adoption of WLP approaches that are already field proven in other industry applications like IC and MEMS WLP. SUSS MicroTec offers a wide product portfolio of high quality equipment which provides tailor made solutions and processes to meet the specific requirements of tomorrows LED WLP designs.

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