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Our bi-annual customer magazine SUSS Report provides you with an insider update on innovations and trends in equipment solutions for the semiconductor and related industries. You will find exciting technical publications as well as praxis-orientated reports and personal notes by our experts.
Interested to find out what it is? Have a look in our latest issue as well as in our SUSS Report archive.
Issue 01 / 2010
Published in April 2010
Panasonic's Plasma Dicing Technology
In a joint project Panasonic Factory Solutions and SUSS MicroTec are developing a plasma dicing process that involves photolithography and plasma etching. Plasma dicing offers cost advantages over other dicing technologies for wafers with small dies and yields an exceptional ultra-fine dicing result without chipping effects. The lithography process has been developed on SUSS MicroTec's integrated LithoPack300 cluster. The plasma dicing step is performed on a PSX800 from Pasasonic Factory Solutions. Here the features of plasma dicing process and its applications are being introduced.
Local Plasma Treatment in a Mask Aligner for Selective Wafer Surface Modification
A team of scientists and engineers at Fraunhofer IST has been evaluating the opportunities offered by applying DBD plasmas at ambient pressure to surface-technological processes such as coating, functionalization, cleaning, and etching - processes which are also of interest for MST applications. One driving force behind these efforts is the desire or requirement to reduce process costs by making expensive vacuum equipment dispensible. In fact it was shown in many studies that atmospheric- pressure plasmas could be applied to surface-technological purposes with similar or even better technical performance than low-pressure plasmas - activation of wafer surfaces prior to bonding is a good example.
In the Spotlight - LED Production SUSS MA100e Mask Aligner
Light emitting diodes (LEDs) are increasingly used in many lighting products covering not only the visible spectrum but also ultraviolet and infrared applications. The demand for increased productivity and lower cost for the production of LED are met by dedicated equipment that combines highest throughput with the ability to meet the particular technological requirements and cost constraints of the LED industry. With the new MA100e Mask Aligner, on optimized tool has come for small wafer sizes up to 4 inch and equipped with a special high throughput upgrade, including a new pre-aligner, especially designed for transparent wafers.
Metal Based Wafer Bonding Techniques for Wafer Level Packaging
This paper describes the necessary conditions required to successfully utilize metal based wafer bonding techniques, including diffusion and eutectic bonding, for wafer level packaging. It has been acknowledged by MIG a BKP (Best Known Practice).
Plasma Assisted Low Temperature Silicon to Glass Direct Bonding as an Alternative to Anodic Bonding
Glass has continuously been attractive to MEMS and medical device applications because of its high insulation, easy workability and excellent transparent behavior. In the last few years, glass as a wafer bonding substrate has also made it to the CMOS Image sensor market. However most of existing methods for glass bonding (anodic, adhesive) are not suitable for packaging advanced MEMS devices.
Hermeticity Characterization of Eutectic and Low Temperature Direct Bonded SI Wafers Without Getters
For many MEMS products hermetic encapsulation is necessary to enable stable functioning over the device lifetime. In this paper low temperature direct bonds and eutectic bonded Si wafers will be compared in terms of hermetic sealing. The leakage test was performed by two different methods, a He leakage test and an FTIR spectroscopy method to deterime or quantify the leak rate.
SUSS Building Blocks of Lithography
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