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TSV (3D, 2.5D)

Vertical through silicon vias (TSVs) represent the key component in 3D integration.  Vias enable vertically stacked chip components to be interconnected.

This results in data flow channels that provide significant advantages:

  • Improved electrical performance
  • Reduced power consumption
  • More miniaturized components

 

The utmost precision is required in manufacturing the vias, and the process represents a tremendous challenge for equipment manufacturers. In manufacturing TSVs, an etch mask is first created, which is used to etch and fill the vias.

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