Advanced MEMS Manufacturing Technology
MEMS technology is facing new challenges since thin wafer handling will be used more and more to archive smaller dies. Packaging the next device on the top of the first and so on called package on package (POP), reduces the wire bonding as the connections will be via through vias that run through the bulk silicon and such, the size of the second (third, fourth ...)can have the same size as the first one. Thismeans more space for the die but less additional work to connect the dies to each other. Perhaps the most significant is the substantially larger market size and the drive toward lower costs. CMOS Image Sensors, Memory, Mixed Signals, FPGA (Flexible Program Gate Array), andMicroprocessors are the utilized applications for thinned 3D wafers with interconnections. The bonding method therefore is thermo compression bonding with Cu-Cu bond layer material for the interconnections. Another method is fusion bonding. Both methods require very precise alignment accuracy. This precise alignment is very challenging, as the needed alignment is in the sub micron area.