Creating Planar Embedded RDL Structures Without CMP
Planarization is an essential part of any multilayer RDL stack structure. Embedded conductors are a means to this end, but deposition processes to this point have included significant metal on the top surface, requiring CMP for removal. This not only represents an added expense in equipment and materials, but may be a barrier to panel applications. We have shown that, with the right combination of materials, patterning method, and metallization, an embedded conductor structure can be fabricated with minimal residual metal, which can be removed with simpler and less expensive techniques. One key aspect of this is the use of bottom-up electroplating, adapted from TSV processing.