With the MA100/150e Gen2 SUSS MicroTec has designed a dedicated mask aligner platform for processing high brightness LEDs (HB-LED) on substrates up to 150mm. With its high precision mask alignment, sophisticated substrate handling for fragile, warped and transparent wafers and its high resolution down to 0.7µm the MA100/150e Gen2 is able to overcome all lithography challenges given by the LED manufacturing process. Lowest cost of ownership is achieved by superior throughput performance.
Dedicated Mask Aligner Solution for HB-LEDs, Power Devices, RF-MEMS etc.
Simultaneous handling of 3 wafers allows > 145 wph. incl auto-alignment and exposure
SUSS Diffraction Reducing Optics allows proximity printing for challenging resolution requirements (down to 3µm L/S at 20µm exposure gap in thin resist on 100mm wafer)
Multi-size tooling minimizes time required for wafer size changes
Non-contact pre-alignment avoids wafer damages
The 'Line Alignment' function for sapphire wafers aligns scribe lines precisely to the photo mask
Based on SUSS MicroTec's production proven mask aligner design the MA100/150e Gen2 enables exceptional process scalability and fast time-to-market for new device designs, while the industry leading throughput of 145 wafers per hour reduces cycle time.
The MA100/150e Gen2 is optimized for wafers sizes up to 6". The system reliably achieves an alignment accuracy of < ±0.7 µm (DirectAlign). Bottom-side alignment (BSA) is optionally available offering an alignment accuracy of < ±1.5 µm. The alignment unit of the MA100/150e is tailored to the specific requirements of LED manufacturing, offering excellent contrast even on transparent and textured wafers.
For applications using scribe lines the new 'Line Alignment' function allows precise alignment of pre-scribed sapphire wafers to the photo mask without need of traditional wafer targets.
Where lithographic processes require the alignment of structures on only one side of the device wafer (e.g. RDL, microbumping and similar techniques), top-side alignment is used to align the fiducials on the mask with those of the wafer. Depending on substrate properties, this can be achieved either using stored position data for the wafer or through live image alignment, as in the DirectAligntm system invented at SUSS MicroTec.
Bottom-side Alignment (BSA)
Alignment of the structuring on the wafer back side with the structures on the front is required in processes involving applications such as MEMS, wafer-level packaging and 3D integration, where used for example to create vertical through silicon vias (TSVs) on interposers. Optical bottom side alignment is normally used for this type of alignment. An integrated camera system detects the mask structures and the structures on the wafer back side and aligns them with each other. The wafer position has to be determined and stored prior to loading, since the wafer afterwards conceals the mask target. This places specialized demands on the alignment system as a whole.
Features and Benefits
Enhancing Alignment Precision
When stringent demands are made of overlay accuracy, the auto-alignment functionality of the standard system can be considerably refined. DirectAlign®, the SUSS MicroTec enhanced functionality for structure detection software, uses live images instead of patterns from an image memory system. The technology is based on the industry standard PatMax and achieves outstanding results. Using DirectAlign® for top-side alignment on a SUSS mask aligner allows accuracy of 0.5 µm to be achieved.
The use of Enhanced Alignment is recommended for challenging alignment processes with easily confused structures or restricted fields of view.
Multilayer wafer stacks are used in a number of structuring processes. By means of infrared (IR) illumination, the alignment marks that in the typical case are embedded between the layers can be identified and aligned.
Alignment can also be done using IR light based on such embedded marks. These require the use of materials that are transparent for IR light, such as undoped silicon, III-V semiconductors (e.g. GaAs) and adhesives for temporary bonding and debonding techniques. Specific cases should be tested to verify process feasibility.
In order to ensure availability of IR alignment to the greatest possible extent, the SUSS equipment can be optionally equipped with powerful IR light sources and high performance camera systems.
A mask with a certain structure is aligned with the wafer in very close proximity (thus “proximity” lithography). During exposure, the shadow cast by the mask structure is transferred to the wafer. The resulting exposure quality depends on both the precision with which the mask and wafer are spaced apart and the optical system used for exposure.
Being fast and suited to flexible implementation, this method is regarded as the most cost-effective technique for producing microstructures down to 3 µm in size. With contact exposure, resolutions in the sub-micron range can be achieved. Typical areas of use include wafer-level chip-scale packaging, flip chip packaging, bumping, MEMS, LED and power devices. The systems are deployed in high-volume production as well as in industrial research.
The mask aligners supplied by SUSS MicroTec are based on proximity lithography.
Features & Benefits
The lower the exposure gap from mask to wafer, the higher the resolution. In soft contact mode the wafer is brought into contact with the mask and is fixed onto the chuck with vacuum.
In hard contact mode the wafer is brought in direct contact with the mask, while positive nitrogen pressure is used to press the substrate against the mask. In hard contact mode a resolution in the 1 micron range is possible.
The large gap optics (LGO) optics is optimized for thick resist processes with large exposure gaps and 3D lithography, offering a resolution down to 5μm. The high resolution optics (HR) is apt for contact and close proximity lithography with structures down to 3μm at 20μm exposure gap. For processes with high dose requirements on 150mm wafers the exceptionally high intensity of the W150 HR optics facilitates high throughput.
The diffraction reducing exposure optics is designed to compensate diffraction effects in both contact and proximity lithography. Instead of using a plane wave as in other proximity lithography tools it provides an angular spectrum of planar light waves to reduce diffraction effects. The selection of a proper angular spectrum improves structure resolution in the resist.
MO Exposure Optics® is a unique illumination optics specifically designed for SUSS mask aligners. It is based on micro-lens plates instead of macroscopic lens assemblies. A simple plug & play changeover allows for a quick and easy changeover between different angular settings including the functionality of both classical SUSS HR and LGO illumination optics.
The telecentric illumination which is provided by the MO Exposure Optics improves light uniformity and leads to a larger process window. In consequence, this causes yield enhancements. MO Exposure Optics also decouples the exposure light from the lamp source thus small misalignments of the lamp do not affect the light uniformity. A decoupled light source saves setup and maintenance time and guarantees uniform illumination conditions during the full life-time of the lamp.
Light Source of the Future
The new lamp house concept from SUSS MicroTec convinces with efficiency - UV-LED light sources reach many times the service life of conventional mercury vapor lamps. Moreover, they no longer need to warm-up and cool-down - the LED is only switched on during exposure. These factors significantly contribute to comparatively low energy consumption. And unlike mercury vapor lamps, they require no cumbersome hazardous-waste disposal.
The SUSS UV-LED lamp house features the latest in technology and thus meets the growing demand for environmental sustainability and energy efficiency.
The use of an LED lamp house significantly affects the operating costs of a Mask Aligner. The service life of an LED exceeds that of conventional lamps many times over, thereby lowering costs generated by changing lamps. Downtimes, acquisition of new lamps, adjustments and disposal of old material have become a thing of the past.
Guaranteed Process Flexibility
Compared to conventional mercury vapor lamps, LED light sources not only work more efficiently but are also much more flexible to use. The UV-LED lamp house generally covers the same spectral region as mercury vapor lamps. The difference is that the UV-LED can switch specific wave lengths on and off. This eliminates the need to optically filter the light outside of the lamp house. Wave lengths are regulated via programed formulas which fulfill specific process requirements without filter change or recalibration.
When interacting with SÜSS MicroTec's special optics MO Exposure Optics, the LED lamp house provides for maximum flexibility in process design.
Working with the LED lamp house is both safe and environmentally sound and is a major step up in health and occupational safety, as well as in environmental protection.
SUSS mask aligners are equipped with a WEC head system that allows reaching the parallelism between substrate and mask with a micrometric precision.
Auto Alignment is based on a motorized alignment stage. The COGNEX® based pattern recognition software automatically recognizes wafer target locations and controls the movement of the alignment stage. Coupled with SUSS MicroTec‘s DirectAlign® accuracies down to 0.25μm can be achieved. Auto Alignment enables highest repeatability of process results coupled with optimized throughput and minimum operator intervention.
Overlay accuracy regularly suffers considerable degradation due to the thermal run-out between photomask and the wafer. The SUSS MicroTec compensation system ThermAlign® ensures a constant temperature on the wafer chuck and additionally provides a stabilizing influence on the mask temperature. ThermAlign® compensates for run-out effects by adapting the temperature to the process conditions.
Implementation with Dark Field Masks
Large clearfield alignment is used in dark field mask applications. These contain very small clearfields, which means the targets on the wafer are difficult to localize. The large clearfield method allows the mask to be moved out of the visual field and so the target on the wafer is localized without being obscured by the mask itself.
Error rate reduction
For the alignment of specific challenging process requirements SUSS MicroTec offers the enhanced alignment function package which significantly reduces the error rate based on redundancy.
For situations where the alignment marks are damaged the system offers the option of defining replacement positions. Furthermore, it enables a two-stage final alignment process to be carried out which consists of an initial coarse alignment using guide marks followed by a fine alignment carried out using the same marks.
The use of enhanced alignment is recommended for complex processes with easily confused structures, such as with advanced packaging, for example, or with restricted fields of view, such as with dark-field masks.
Simulation of lithographic processes
A simulation of lithographic processes makes the selection of optimal settings for process parameters possible without long-winded trial and error sessions. The multi-functional simulation software of lithographic processes “Lab”, which SUSS MicroTec distributes together with the supplier, GenISys, first and foremost allows the operator better process control. It offers all the required simulation functionality for an integrated design and process development, as well as verification and optimization. At the same time it covers all the process steps from illumination shaping and mask layout optimization up to photo resist processing. Additionally, modern 3D simulation functions improve the model visualizations.
The combination of MO Exposure Optics and the for SUSS optics custom-developed optical models in Lab facilitates customer-specific design optimization of the exposure filter plates, which in turn leads to an improvement in pattern fidelity.
Customer Specific Illumination Shaping and Mask Layouts
Combining optimization of mask layouts and the light source (source mask optimization), a procedure from projection lithography, makes it possible to reduce pattern inaccuracies due to illumination errors, processing artifacts and diffraction. A combined selection to match the exposure filter plates with the mask patterns (OPC = optical proximity correction) to customer specific requirements allows considerable expansion of the lithographic process functionality.
A simulation platform permits modeling of process parameters such as mask patterns and illumination parameters. This facilitates the exposure and mask patterns to be set for specific production situations with a reduced experimental effort, and reduces illumination and process errors.
Source mask optimization, together with SUSS MicroTecs customizable MO Exposure Optics® form an important contribution to improvement of process stability in mask aligner lithography.
Handling Fragile and Bent Substrates
Handling wafers is the major challenge when automating production processes. In a production environment with high process change rates and therefore a large number of different substrates, for example in foundry production, the handling systems have to meet rapidly changing requirements. The reliability of the automatic handling has a direct effect on through-put and yield. SUSS mask aligners have a choice of flexibly interchangeable special tooling for handling the widest range of fragile, bent or warped substrates, and the tooling can be customized even further for particularly arduous production processes according to customer specifications.
Handling of Thinned Wafers
A special vacuum chuck supports ultra-thin wafers with thicknesses of less than 120 µm and down to 50 µm.
Handling of Warped Wafers
Bent and warped wafers are carefully pulled flat before alignment and exposure. Due to the variety of the parameters that affect it, an optimal tooling implementation requires adaptation for the specific substrate.
A special carrier system protects the wafer, especially suitable for the protection of double-sided structures as for MEMS applications.