Highly Automated Platform for 300mm and 200mm Wafers
The SUSS MicroTec Mask Aligner has become synonymous with superior quality, high alignment accuracy, and sophisticated exposure optics. SUSS MicroTec offers a complete range of mask aligners for high-end fab automation, high volume production and R&D environments alike. SUSS MicroTec designs their mask aligner systems for lithography applications in the field of 3D packaging, advanced packaging, MEMS, LED, compound semiconductors, power devices, photovoltaic, nanotechnology and wafer-level optics.
SUSS MicroTec’s mask and bond alignment platforms perform high precision alignment for mask-to-wafer as well as wafer-to-wafer operations. The equipment processes substrates and wafer up to 300 mm of any kind of material and thickness. With a wide variety of additional functionality the mask aligner not only meets various process requirements but also succeeds with its flexible configuration modes.
A mask with a certain structure is aligned with the wafer in very close proximity (thus “proximity” lithography). During exposure, the shadow cast by the mask structure is transferred to the wafer. The resulting exposure quality depends on both the precision with which the mask and wafer are spaced apart and the optical system used for exposure.
Being fast and suited to flexible implementation, this method is regarded as the most cost-effective technique for producing microstructures down to 3 µm in size. With contact exposure, resolutions in the sub-micron range can be achieved. Typical areas of use include wafer-level chip-scale packaging, flip chip packaging, bumping, MEMS, LED and power devices. The systems are deployed in high-volume production as well as in industrial research.
The mask aligners supplied by SUSS MicroTec are based on proximity lithography.
Features & Benefits
Where lithographic processes require the alignment of structures on only one side of the device wafer (e.g. RDL, microbumping and similar techniques), top-side alignment is used to align the fiducials on the mask with those of the wafer. Depending on substrate properties, this can be achieved either using stored position data for the wafer or through live image alignment, as in the DirectAligntm system invented at SUSS MicroTec.
Bottom-side Alignment (BSA)
Alignment of the structuring on the wafer back side with the structures on the front is required in processes involving applications such as MEMS, wafer-level packaging and 3D integration, where used for example to create vertical through silicon vias (TSVs) on interposers. Optical bottom side alignment is normally used for this type of alignment. An integrated camera system detects the mask structures and the structures on the wafer back side and aligns them with each other. The wafer position has to be determined and stored prior to loading, since the wafer afterwards conceals the mask target. This places specialized demands on the alignment system as a whole.
Features and Benefits
Multilayer wafer stacks are used in a number of structuring processes. By means of infrared (IR) illumination, the alignment marks that in the typical case are embedded between the layers can be identified and aligned.
Alignment can also be done using IR light based on such embedded marks. These require the use of materials that are transparent for IR light, such as undoped silicon, III-V semiconductors (e.g. GaAs) and adhesives for temporary bonding and debonding techniques. Specific cases should be tested to verify process feasibility.
In order to ensure availability of IR alignment to the greatest possible extent, the SUSS equipment can be optionally equipped with powerful IR light sources and high performance camera systems.